Data processors which perform a variety of functions are typically implemented with a plurality of units where each unit performs a predetermined function. Further, a data processor with a plurality of units, termed a "modularized" data processor, typically communicates between the units via a commonly connected bus. For example, a modularized data processor may include units such as a central processing unit (CPU), a system integration module (SIM), and a read only memory (ROM) unit. The CPU processes data within the modularized data processor, the SIM unit coordinates communication of data processing information between each of the units, and the ROM typically contains data and instruction information for data processing.
A problem associated with a modularized data processor is structural testing of transistors within each of the modules. Historically, methods of structural testing require a dedicated test unit to communicate with a test circuit within each data processing unit of a modularized data processor. Further, the dedicated test unit historically communicates to each of the test circuits via dedicated control signals that are separate from normal data processing control signals.
Another common problem associated with a modularized data processor is controlling clocking signals within each unit to eliminate data processing problems associated with inadequate clocking signals. Common inadequacies of clocking signals within a data processing unit include, but are not limited to, insufficient control of the generation of each clocking signal, and excessive time delays for generating each clocking signal within each unit with respect to a reference master clock signal. A current method of creating clocking signals within a unit of a modularized data processor is to repeatedly buffer the reference clock signal at each unit. A problem associated with buffering the reference clock signal at each unit is an added delay associated with the repeated buffering which may cause race conditions within the modularized data processor.
As the complexity and number of units within a modularized data processor increase, which requires an increase in the number of dedicated test information signals and added test logic, a more systematic and cost effective solution to structural testing of transistors is desired. Further, as the complexity and processing speed of the modularized data processor increases, improved control of clocking signals is necessary.